Chemical Vapor Deposition (CVD) and Chemical-Mechanical Polishing (CMP) are well known methods for fabricating semiconductor circuits. CVD is one of the most common thin film deposition methods in semiconductor manufacturing. As is known, in this method materials are formed on a previously deposited layer as a result of a chemical reaction between gaseous reactants at an elevated temperature. A solid product of the reaction is then deposited on the surface of the previously deposited layer. Both metallic, semi-metallic and insulator materials may be deposited in this manner. Chemical-Mechanical Polishing (CMP) is a method of removing desired layers of a solid material for the purpose of planarizing the surface and also to define a metal interconnection pattern.
However, while planarization of the surface by the CMP process produces a reasonably smooth result, the grain of the material, particularly the deposited metal used for interconnection lines may be raised or grown when the semiconductor material is heat-treated in order to anneal the current layer or applying a next layer using additional CVD and/or CMP processing. Raising of the metal grain is disadvantageous as it distorts the smooth metal surface by creating ridges and valleys. The ridges and valleys thus may lead to unreliable results as a high quality connection between subsequently laid metal interconnection may not be created.
Accordingly, there is a need in the industry to provide a method for reducing the roughness created in the metal interconnection materials caused by the high temperatures used in the CVD process.